AMD at Advancing AI 2026: What Shipped on 22-23 July
AMD held its Advancing AI 2026 event at the Moscone Center in San Francisco on 22-23 July, with CEO Dr Lisa Su delivering the keynote on the morning of 23 July. The announcements span three hardware layers: rackscale AI infrastructure, server silicon, and physical AI processors for edge and robotics. The headline product is the AMD Helios AI Rack System — the company's first fully co-designed rackscale platform and a direct challenge to Nvidia's GB300 NVL72 on performance per dollar of inference. Alongside Helios, AMD launched the Instinct MI400 Series GPUs and the sixth-generation EPYC Venice server processors, both built on TSMC's 2-nanometre process.
The Helios AI Rack: 2.9 Exaflops in a Single Chassis
The Helios rackscale system is a fully integrated, liquid-cooled platform combining 72 AMD Instinct MI455X GPUs with 18 sixth-generation EPYC Venice CPUs, linked by AMD Pensando networking fabric using the UALoE scale-up interconnect. At full specification a single Helios rack delivers 2.9 exaflops of FP4 inference throughput, 1.4 exaflops of FP8 training throughput, 31 terabytes of total HBM4 memory, 1.7 petabytes per second of aggregate memory bandwidth, 260 terabytes per second of scale-up interconnect bandwidth, and 43 terabytes per second of Ethernet scale-out bandwidth. AMD prices the Helios rack between five million and 5.5 million US dollars per unit. The company claims Helios delivers 30 percent more inference tokens per dollar than the leading competitive solution and states that Helios is already in production, being deployed by leading AI companies at gigawatt scale.
Instinct MI455X: 432 GB HBM4 at 19.6 TB/s Bandwidth
The MI455X is the flagship GPU in the Instinct MI400 Series, designed for large-model AI training and inference. Its memory specification represents the most significant generational jump of the announcement: the MI455X carries 432 gigabytes of HBM4 — a 50 percent capacity increase over the MI350 Series' 288 gigabytes of HBM3e — at a bandwidth of 19.6 terabytes per second, more than double the MI350 Series' 8 terabytes per second. The companion MI430X is targeted at HPC workloads. On a published benchmark using DeepSeek-V4-Flash — a widely deployed open-weight model — AMD reports the MI455X delivers 34 times higher token throughput at high interactivity and 18 times lower token cost compared with the prior-generation MI355X.
From MI350 to MI455X: Why the Bandwidth Jump Matters
The MI350 Series shipped with 288 gigabytes of HBM3e at 8 terabytes per second. The step to 432 gigabytes of HBM4 at 19.6 terabytes per second is not incremental. For large frontier models — where memory capacity and bandwidth are the binding constraints on inference throughput — this change alters the economic calculation of model serving. Architectures that previously required multiple MI350X GPUs to hold a frontier model in memory can run on fewer MI455X units. The HBM4 bandwidth improvement also reduces the memory latency bottleneck in autoregressive generation, which is the primary determinant of tokens-per-second throughput in batch serving scenarios.
EPYC 9006 Venice: 256 Cores on a 2nm TSMC Process
The sixth-generation EPYC 9006 Series, codenamed Venice, is built on TSMC's 2-nanometre process using AMD's Zen 6 microarchitecture. The flagship SKU — the EPYC 9996 — delivers 256 cores per socket, making it the first server CPU to reach that core count on 2nm silicon. AMD claims the EPYC 9996 achieves up to 3.4 times the throughput of Intel's current Xeon platform and approximately 20 percent higher performance than Nvidia's competing Vera CPU. The 3D V-Cache variant of the EPYC 9006 family supports up to 1024 megabytes of L3 cache in a single socket — relevant for inference workloads where large key-value caches must remain on-chip. The 9006 Series spans 8 to 256 cores, covering configurations from single-threaded latency-optimised workloads to massively parallel training jobs.
Physical AI: Kria, Ryzen AI Embedded X100, and the Robotics Network
Beyond the data centre, AMD announced the Kria AI Solutions platform for edge inference and the Ryzen AI Embedded X100 Series for physical AI applications. The Ryzen AI Embedded X100 pairs up to 16 Zen 5 CPU cores with an integrated RDNA 3.5 GPU and a dedicated NPU on a single system-on-chip, targeting autonomous mobile robots, factory-floor AI cameras, and embedded inference applications requiring low power in a compact form factor. AMD simultaneously launched the AMD Robotics Partner Network, a structured programme to qualify hardware, software, and integration partners building on these embedded platforms.
What AMD's Announcements Mean for Development Teams and India's AI Sector
For development teams building AI services on cloud infrastructure, the Helios rack's claimed 30 percent lower cost per inference token — if verified by independent benchmarks — directly affects the economics of deploying large frontier models. Indian hyperscale data centre operators, several of which have announced aggressive GPU procurement targets for 2026, will evaluate Helios alongside Nvidia's NVL72 as they plan their next capacity additions. The MI455X's 19.6 terabytes per second bandwidth also raises the ceiling on what model sizes are economically serviceable at scale without extreme multi-GPU parallelism. For Indian enterprises running mixed HPC and AI workloads on on-premise servers, the EPYC 9996 Venice's 3.4 times advantage over Intel Xeon is relevant for any organisation due to refresh a server estate in the second half of 2026. Software teams building on AMD-based cloud instances from major providers should also expect the MI455X to reduce per-token API costs as cloud providers upgrade their data centre hardware over the coming quarters.
The Bottom Line
AMD launched the Helios rackscale AI system, the Instinct MI455X GPU, and the sixth-generation EPYC 9006 Venice processor at Advancing AI 2026 in San Francisco on 22-23 July 2026. A single Helios rack delivers 2.9 exaflops of FP4 inference from 72 MI455X GPUs and 18 EPYC Venice CPUs, with 31 terabytes of HBM4 memory and a claimed 30 percent lower cost per inference token than the leading competitive platform; the rack is priced at five million to 5.5 million US dollars and is already in production. The MI455X carries 432 gigabytes of HBM4 at 19.6 terabytes per second bandwidth — more than double the prior MI350 Series — with AMD reporting 34 times higher token throughput on DeepSeek-V4-Flash versus the MI355X. The EPYC 9996 Venice delivers 256 cores on a 2nm process at 3.4 times Intel Xeon performance. For Indian AI infrastructure buyers and development teams, the Helios launch is the most direct challenge yet to Nvidia's rackscale dominance and a meaningful signal that the cost of serving frontier AI models at scale is set to fall further in 2026.
Frequently Asked Questions
What is the AMD Helios AI Rack System announced at Advancing AI 2026?+
The AMD Helios AI Rack System is AMD's first fully co-designed rackscale AI infrastructure platform, announced at Advancing AI 2026 in San Francisco on 22-23 July 2026. Each Helios rack integrates 72 AMD Instinct MI455X GPUs with 18 sixth-generation EPYC Venice 9006 Series CPUs and AMD Pensando networking using the UALoE fabric, all in a liquid-cooled chassis. A single rack delivers 2.9 exaflops of FP4 inference throughput, 31 terabytes of HBM4 memory, and 1.7 petabytes per second of memory bandwidth. The rack is priced between five million and 5.5 million US dollars. AMD claims Helios delivers 30 percent more inference tokens per dollar than the leading competitive solution and states that it is already in production.
What are the specifications of the AMD Instinct MI455X GPU?+
The AMD Instinct MI455X, the flagship GPU in the new Instinct MI400 Series announced on 22 July 2026, carries 432 gigabytes of HBM4 memory — a 50 percent increase over the MI350 Series' 288 gigabytes of HBM3e — at a memory bandwidth of 19.6 terabytes per second, more than double the MI350 Series' 8 terabytes per second. On a DeepSeek-V4-Flash inference benchmark, AMD reports the MI455X delivers 34 times higher token throughput at high interactivity and 18 times lower token cost compared with the prior-generation MI355X. The MI455X is paired with the EPYC Venice 9006 CPUs inside the Helios rackscale system.
What is new in AMD's EPYC 9006 Venice processor?+
The AMD EPYC 9006 Series, codenamed Venice, is AMD's sixth-generation server CPU built on TSMC's 2-nanometre process using the Zen 6 microarchitecture, announced at Advancing AI 2026 in July 2026. The flagship EPYC 9996 SKU delivers 256 cores per socket — the highest core count from any server CPU on TSMC's 2nm node. AMD claims the EPYC 9996 delivers 3.4 times the throughput of Intel's current Xeon platform and around 20 percent higher performance than Nvidia's competing Vera CPU. The 3D V-Cache variant supports up to 1024 megabytes of L3 cache per socket, and the 9006 family spans 8 to 256 cores across different SKUs.
How does AMD Helios compare to Nvidia's rackscale AI systems?+
AMD claims the Helios rack delivers 30 percent more inference tokens per dollar than the leading competitive solution — widely understood to mean Nvidia's GB300 NVL72 rack. This claim is based on AMD's internal benchmarks across large language model inference workloads. At the MI455X GPU level, AMD reports 34 times higher token throughput on DeepSeek-V4-Flash compared with AMD's own prior-generation MI355X, indicating a large generational performance jump. The Helios rack is priced between five million and 5.5 million US dollars. Independent third-party benchmark comparisons against Nvidia's NVL72 were not published at launch. For buyers evaluating rackscale AI infrastructure in India and globally, Helios is the first fully co-designed AMD alternative to Nvidia's platform, combining AMD GPUs, CPUs, and networking rather than requiring customers to source and integrate components separately.
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TechPillow Team
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